/* STACK */
#define SP_L	0x3d
#define SP_H	0x3e
#define STACK	0x025f

/* I/O PORT B */
#define DDRB   0x17	/* data direction register (0 -> in, 1 -> out) */
#define PORTB  0x18	/* data register */

	.text
.global main
main:
	/* setup a stack */
	ldi	r28, lo8(STACK)
	ldi	r29, hi8(STACK)
	out	SP_L, r28
	out	SP_H, r29

	/* set PORTB to output */
	ldi	r20, 0xff
	out     DDRB, r20

	/* main loop */
mainloop:
	ldi	r21, 0x00	; PORTB = 0x00, all leds ON 
	out	PORTB, r21
	rcall	delay		; cause some delay
	ldi	r22, 0xff	; PORTB = 0xff, all leds OFF 
	out	PORTB, r22
	rcall	delay		; cause some delay
	rjmp	mainloop	; repeat forever

	/* delay loop */
delay:
	ldi	r24, 0xff	; load 0xffff to r24:25
	ldi 	r25, 0xff
delayloop:
	sbiw 	r24,1		; decrement r24:25
	brne	delayloop	; branch if not 0
	ret